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如何设计高编码效率的视频编码器
作者:电子工程…  来源:电子工程专辑  发布时间:2006-10-25 11:58:38

Advanced Encoding Standard (AVC).

A major source of confusion has been the role of MPEG4: in the initial stages of the original MPEG4 rollout, much attention was paid to the lower bit rate aspect and not enough to the quality aspect. In reality, the MPEG4 that predates H.264 was in fact designed for significantly lower bitrates than MPEG2 supporting lower quality thresholds such as internet movie content. In actual movie quality thresholds, normal savings for MPEG4 are marginally a 15% savings in bitrate over MPEG2 at identical conditions around standard DVD movie quality, and in silicon, the best commercial MPEG2 encoders do beat the best pre-H.264 MPEG4 encoders. At lower quality, bitrate savings of MPEG4 are more dramatic, easily reaching . the size of files.

Without sufficient emphasis on video quality, implementation complexity caused the center of gravity for MPEG4 to move to areas such as Simple Profile CIF and QCIF resolutions at lower frame rates. MPEG4-SP is not comparable to DVD resolution and that did not help MPEG4 get wide adoption.

There is now a “new MPEG4” -previously known as H.264 and now commonly known as MPEG4-AVC. There is also a separate codec from Microsoft known as Windows Media 9. Both are part of the Blue-Ray and HD-DVD standards, though only a portion of Windows Media 9 was offered to the Society for Motion Picture and TV Engineers (SMPTE) as the VC-1 codec, which is the video codec portion of WMV9. WMV9 contains supersets of VC-1 such as Digital Rights Management and playlist navigation.

Example ASIC architecture for programmable Video Processors

This is is a simplified block diagram of the internals of a possible vector processor based programmable IC. XCODE family of ICs by ViXS are based on this architecture. These family of video processing IC are offered to enable and answer some of the algorithmic and complexity challenges posed by the preceding sections and it is important to examine this architecture.

Multiple technical challenges and potential solutions have been presented and/or discussed in various detail throughout this analysis of: encoding techniques, advances and required elements such as a good video acquisition chain.

As an end to this discussion I present a possible architecture that incorporates much of this material (including advanced encoding techniques and high-speed Transrating and transcoding) in an efficient and cost effective manner.

The technical challenges as presented can be solved in many ways, but the following is the approach taken in the XCode-II as discussed in Fig 6.

Programmable Processor Units are simply general purpose processors such as RISCs or DSPs; they can load program stores and can have code and data cache if their workload is complex enough. Vector processors in this architecture refers to specialized fixed logic accelerators with programmability described in terms of data routing or processing parameters (registers), but internal processing functions cannot be changed. Examples of Vector Processors are Discrete Cosine Transforms (DCT) blocks or motion search or scalers. When designed properly, several vector processor blocks can be combined to form a pipelined processing unit that can operate with minimal intervention by the Programmable Processor Units.

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